The course is aimed to describe a simple computer architecture, with emphasis on pipelining and memory hierarchy, by providing all the elements required to motivate design choices, understand the functioning, evaluate performance, and capture the relationship between architectural design choices and software programming techniques.

01. Introduction:
01.01 Automatic Information Processing.
01.02 Brief History of Computing.

02. Information Theory:
02.01 Digital Encodings.
02.02 Representation of Numerical Sets and Binary Arithmetic.
02.03 Representation of Non-Numerical Sets.
02.04 Special Encodings: Redundancy and Compression.

03. Logic Networks:
03.01 Boolean Algebra. 
03.02 Switching Networks and Combinational Circuits.
03.03 Sequential Circuits.
03.04 Gate-Level Design.
03.05 Digital Systems.
03.06 Lab: Logic-Level Design and Simulation using TkGate.
03.07 Address Decoding.

04. Computer Systems:
04.01 Von-Neumann Bottleneck and CPU Micro-Architecture.
04.02 Istruction-Set Architecture. 

05. CPU:
05.01 Elementary Pipelining and Performance Metrics.
05.02 Reference Architecture: DLX.
05.03 Pipeline Hazards.
05.04 Lab: Cycle-Accurate Simulazione of DLX Pipeline using WonDLX/WinMIPS.

06. Performance Optimization:
06.01 Static Code Optimization.
06.02 Lab: Example of Simulation-Driven Static Code Optimization.
06.03 Multiple-Issue Processors.
06.04 Dynamic Optimization: OOO Execution and Speculation.
06.05 Lab: Development and Use of Performance Benchmarks.

07. Memory:
07.01 Memory Devices: SRAM and DRAM.
07.02 Non-Volatile Memory Devices: ROM and Flash.
07.03 Memory Hierarchy: Caching and Virtual Memory.

08. Communication:
08.01 BUS and I/O.
08.02 I/O Synchronization: Interrupts and DMA.

There are no mandatory prerequisites for this exam.
It is worth noticing that the topics covered by this course will be used in Databases and Operating Systems.

Knowledge and understanding

The student will acquire the fundamental knowledge in the field of computer architecture and in its foundations, with particular attention to: digital representations, switching theory, logic gates, Boolean networks, combinational and sequential circuits, synchronous digital systems, microprocessors, memory devices, hardwaresoftware interfaces, synchronization. The student will learn the principle and functioning of the main architectural solutions, with paricual emphasis on pipelining, data forwarding, caching, and virtual memory. The student will also acquire the basic knowledg to conduct a design space exploration by evaluating design metrics and comparing possible solutions.

Applying knowledge and understanding
The student will be able to design and simulate small digital systems and their arthmetic-logic components, working al logic, gate, and RT levels. The students will be able to apply elementary logic synthesis techniques, together with top-down and bottom-up design strategies. The student will be also able to translate into an assembly language a small code segment and to conduct static optimizations aimed at reducing the number of stalls in the pipeline.

Making judgements
The student will be able to evaluate and compare alternative architectural solutions that implement a given functional specification, estimating the main design metrics in order to meet requirements and make optimal design choices.

Communication skills
The student will be able to appropriately use the specific terminology of computer architecture together with the terminology of the other topics of the degree program. The student will have the opportunity to experience team work and to present a project.

Learning skills
The student will acquire the ability to fully understand the critical issues of hardware-software systems and to learn the architectural solutions adopted to address them. Such ability will be autonomously exploited to understand and learn the solutions not covered by the course.

The teaching material prepared by the lecturer in addition to recommended textbooks (such as for instance slides, lecture notes, exercises, bibliography) and communications from the lecturer specific to the course can be found inside the Moodle platform › blended.uniurb.it

Learning notes, handouts, and video tutorials.

Teaching

Theory lectures and laboratory exercises, both face-to-face and on-line.

Attendance

Although recommended, course attendance is not mandatory.

Course books

Lecture notes

Hennessy, Patterson, "Computer Organization and Design: The Hardware/Software Interface", 5th edition, Elsevier (Morgan Kauffman Series), 2013. [http://store.elsevier.com/product.jsp?isbn=9780123747501] (The IV edition is available online on Google books isbn 978-0-12-374750-1)

Hennessy, Patterson, "Struttura e progetto dei calcolatori: L'interfaccia hardware-software", Zanichelli, 2010.

Assessment

Individual project, written exam and (optional) oral exam.

The individual project, which has to be submitted at least three days before the oral exam, is passed if the mark (which is valid for all the exam calls of the same Academic Year) is at least 18/30. 

The written exam takes 1 hour and 30 minutes. At the end of the two teaching periods the written exam can be split into two partial exams of 1 hour each.

The written exam is passed if the mark (which is valid for all the exam calls of the same Academic Year) is at least 18/30. 
The oral exam, which can be taken only if the project and the written exam have been passed, determines a spread between -5/30 and 5/30 of the average of the two previous marks, thus yielding the final mark.
There are no limitations to the number of trials per session per year.
The individual project and the written exam can be taken in any order. 
If a student decides to take the written exam more than ones before taking the oral exam, the mark of the last trial is the one used to compute the final mark.

Disabilità e DSA

Le studentesse e gli studenti che hanno registrato la certificazione di disabilità o la certificazione di DSA presso l'Ufficio Inclusione e diritto allo studio, possono chiedere di utilizzare le mappe concettuali (per parole chiave) durante la prova di esame.

A tal fine, è necessario inviare le mappe, due settimane prima dell’appello di esame, alla o al docente del corso, che ne verificherà la coerenza con le indicazioni delle linee guida di ateneo e potrà chiederne la modifica.

Teaching

Students not attending the course can take advantage of the blended learning and e-learnin platforms.

The course is offered both face-to-face and on-line within the Laurea Degree Program in Applied Computer Science.